Title | TOF-based 3-Dimensional Head-Tracking System for Repetitive Transcranial Magnetic Stimulation |
Author | *Ryo Ebisuwaki, Yoshihiro Yasumuro, Hiroshige Dan, Masahiko Fuyuki (Kansai Univ., Japan) |
Page | pp. 2 - 5 |
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Title | A High-speed H.264/AVC CABAC Decoder for 4K Video Utilizing Residual Data Accelerator |
Author | *Kenji Watanabe (Synthesis Corp., Japan), Gen Fujita (Osaka Electro-Communication Univ., Japan), Toru Homemoto, Ryoji Hashimoto (Osaka Univ., Japan) |
Page | pp. 6 - 10 |
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Title | Low Power Decision Tree-Based Flow Search Engine |
Author | *Eita Kobayashi, Norio Yamagaki, Takashi Takenaka, Satoshi Kamiya (NEC Corp., Japan), Masato Motomura (Hokkaido Univ., Japan) |
Page | pp. 11 - 16 |
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Title | Manycore NOC Based 2400-PE Network on Chip Emulation and Verification Environment |
Author | *Omar Hammami (ENSTA ParisTech, France), Xinyu Li (EVE, France) |
Page | pp. 17 - 21 |
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Title | Bit-Selective SAD and Its Evaluation |
Author | Ryosuke Hamaji, Yongson Choi, Yuko Hara-Azumi, *Shigeru Yamashita (Ritsumeikan Univ., Japan) |
Page | pp. 22 - 27 |
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Title | A Technique for Accelerating SVM-Based Image Recognition Using GPU |
Author | *Jin Sasaki, Yuzuru Shizuku, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa (Kobe Univ., Japan) |
Page | pp. 28 - 32 |
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Title | Variation of Substrate Sensitivity in Differential Pair Transistors |
Author | *Satoshi Takaya, Takashi Hasegawa, Yoji Bando (Kobe Univ., Japan), Toru Ohkawa, Toshiharu Takaramoto, Toshio Yamada, Masaaki Souda, Shigetaka Kumashiro, Tohru Mogami (MIRAI-Selete, Japan), Makoto Nagata (Kobe Univ., Japan) |
Page | pp. 33 - 35 |
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Title | Automatic Generation of GNU Binutils and GDB for Custom Processors Based on Plug-in Method |
Author | Takahiro Kumura (NEC Corp., Japan), Soichiro Taga (Mitsubishi Electric Micro-Computer Application Software Co., Ltd., Japan), *Nagisa Ishiura (Kwansei Gakuin Univ., Japan), Yoshinori Takeuchi, Masaharu Imai (Osaka Univ., Japan) |
Page | pp. 36 - 41 |
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Title | Accelerating Regression Test of Compilers by Test Program Merging |
Author | *Takayuki Fukumoto (Kwansei Gakuin Univ., Japan), Kazushi Morimoto (Nomura Research Institute, Ltd., Japan), Nagisa Ishiura (Kwansei Gakuin Univ., Japan) |
Page | pp. 42 - 47 |
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Title | Random Testing of C Compilers Targeting Arithmetic Optimization |
Author | *Eriko Nagai (Kwansei Gakuin Univ., Japan), Hironobu Awazu (Fujitsu, Japan), Nagisa Ishiura (Kwansei Gakuin Univ., Japan), Naoya Takeda (ITEC Hankyu Hanshin, Japan) |
Page | pp. 48 - 53 |
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Title | Compiler-Assisted Soft Error Correction by Duplicating Instructions for VLIW Architecture |
Author | Yunrong Li, Jongwon Lee (Seoul National Univ., Republic of Korea), *Yohan Ko, Kyoungwoo Lee (Yonsei Univ., Republic of Korea), Yunheung Paek (Seoul National Univ., Republic of Korea) |
Page | pp. 54 - 59 |
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Title | Compiler Generation Method from ADL for ASIP Integrated Development Environment |
Author | *Yusuke Hyodo, Kensuke Murata (Osaka Univ., Japan), Takuji Hieda (Ritsumeikan Univ., Japan), Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai (Osaka Univ., Japan) |
Page | pp. 60 - 65 |
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Title | Mono-instruction Computer on a Dynamically Reconfigurable Gate Array |
Author | *Yuki Nihira, Minoru Watanabe (Shizuoka Univ., Japan) |
Page | pp. 66 - 70 |
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Title | ASPE: an Abstruction Framework using ALU Arrays for Scalable Multiple FPGAs System |
Author | Kenta Inakagata, *Takayuki Akamine, Hirokazu Morishita (Keio Univ., Japan), Yasunori Osana (Ryukyu Univ., Japan), Naoyuki Fujita (Japan Aerospace Exploration Agency, Japan), Hideharu Amano (Keio Univ., Japan) |
Page | pp. 71 - 76 |
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Title | Robust Register Files by Exploiting Asymmetric Soft Error Rate |
Author | *Yohan Ko, Kyoungwoo Lee (Yonsei Univ., Republic of Korea) |
Page | pp. 77 - 81 |
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Title | Performance Comparison of RG-DTM PUF and Arbiter-based PUFs |
Author | *Kousuke Ogawa, Mitsuru Shiozaki, Kota Furuhashi, Kohei Hozumi, Takeshi Fujino (Ritsumeikan Univ., Japan) |
Page | pp. 82 - 87 |
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Title | Hardware Architecture for Accelerating Monte Carlo based SSTA using Generalized STA Processing Element |
Author | *Hiroshi Yuasa, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato (Kyoto Univ., Japan) |
Page | pp. 88 - 93 |
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Title | Head-Tail Expressions for Interval Functions |
Author | *Infall Syafalni, Tsutomu Sasao (Kyushu Inst. of Tech., Japan) |
Page | pp. 94 - 99 |
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Title | A Performance Monitoring Tool Suite for Software and SoC On-Chip Bus |
Author | *Yi-Hao Chang, Ing-Jer Huang (National Sun Yat-Sen Univ., Taiwan) |
Page | pp. 100 - 105 |
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Title | Backward Multiple Time-frame Expansion for Accelerating Sequential SAT |
Author | *Kousuke Torii, Kazuhiro Nakamura (Nagoya Univ., Japan), Kazuyoshi Takagi, Naofumi Takagi (Kyoto Univ., Japan) |
Page | pp. 106 - 110 |
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Title | On Optimization of Power Network Synthesis for Multiple Power Domain Designs |
Author | Chieh-Jui Lee, Shih-Ying Liu, Chuan-Chia Huang, *Hung-Ming Chen (National Chiao Tung Univ., Taiwan) |
Page | pp. 111 - 114 |
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Title | Thermal-Aware Placement for Hotspot Mitigation in 3D FPGAs |
Author | *Juinn-Dar Huang, Ya-Shih Huang, Mi-Yu Hsu, Han-Yuan Chang (National Chiao Tung Univ., Taiwan) |
Page | pp. 115 - 120 |
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Title | Efficient Delay Cells for Wave Pipelined Multifunctional Unit |
Author | Atsushi Kurokawa, *Tatsuya Takaki, Masa-aki Fukase (Hirosaki Univ., Japan) |
Page | pp. 121 - 126 |
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Title | An Integrated Smart Current Sensing Current-Mode Buck Converter |
Author | *Chia-Min Chen, Kai-Hsiu Hsu, Chung-Chih Hung (National Chiao Tung Univ., Taiwan) |
Page | pp. 127 - 130 |
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Title | Linear Time Estimation of Full-Chip Statistical Leakage Current |
Author | *Katsumi Homma (Fujitsu Laboratories Ltd., Japan) |
Page | pp. 131 - 134 |
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Title | An Effective Overlap Removable Objective for Analytical Placement |
Author | *Syota Kuwabara, Yukihide Kohira (Univ. of Aizu, Japan), Yasuhiro Takashima (Univ. of Kitakyushu, Japan) |
Page | pp. 135 - 140 |
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